現(xiàn)代 VLSI 開發(fā)的后端設(shè)計人員面臨巨大的產(chǎn)品上市時間壓力，尤其是對物理驗證的過
程而言時間更是緊張。本文結(jié)合工程經(jīng)驗闡述了物理驗證的步驟和原理，結(jié)合Synopsys 公司的物理驗證工具Hercules 的特點，提出了一種比較省時的物理驗證流程，已用于實際數(shù)字調(diào)制芯片設(shè)計并流片。
關(guān)鍵 詞：集成電路物理驗證 hercules 流程
A Time-saving physical verification method in VLSI design Shang Hui-bin Zhang Xiao-lin
(School of Electronics and Information Engineering, Beihang University，Beijing，100083，China)
Abstract:Nowadays in VLSI design , backend design engineers are facing a time pressure from RTL to gds because of
market competition, especially in physical verification field. Combination of practical experience, the paper
expounds the physical verification principles and structuring, and presents a time-saving flow employing Hercules
tools of Synopys corporation.
Key words: IC physical verification Hercules flow