Miniaturization Trends in Wireless

　　本文著眼于不同的趨勢，減少無線系統的大小和功耗的例子，從德克薩斯儀器，赫和石灰微系統。從數字基帶到高度集成的RF CMOS技術和新材料，以減少功率放大器和無線功率器件的大小，在無線小型化的驅動有許多復雜的工程權衡。組件設計也起著關鍵的趨勢，與可重構無線設備集成更多的系統組件，以減少系統板的整體尺寸。

　　不斷增長的連接世界的需求正在推動無線系統變得越來越小。能夠適應無線鏈接到牙刷，甚至是一對骰子，是越來越多的移動到物聯網（物聯網）和空間的一部分，是一個關鍵的設計標準。然而，有許多不同的優化在無線系統中的小型化。短距離，低功耗無線收發器受益于CMOS制造技術與晶圓代工供應商，包括積極進取的過程節點28納米和20納米射頻庫的縮放。這些過程允許收發器，在2.4 GHz的Wi-Fi或藍牙，被集成在相同的芯片作為基帶MAC協議處理器，因此提供高性能的無線鏈路在幾平方毫米。

　　For example， the CC3100 from Texas Instruments is a Wi-Fi network processor subsystem in a 9 x 9 mm QFN package. Alongside a dedicated ARM MCU that completely offloads the host MCU， the device includes an 802.11 b/g/n radio， baseband， and MAC with a crypto engine for fast， secure Internet connections with 256-bit encryption. All this reduces the footprint of a Wi-Fi node for the IoT， and the CC3100 supports Station， Access Point and Wi-Fi Direct modes along with embedded TCP/IP and TLS/SSL stacks， HTTP server and multiple Internet protocols.

　　The miniaturization is enhanced with an integrated power management subsystem that includes integrated DC-DC converters supporting a wide range of supply voltages. This enables low-power consumption modes， such as ‘the hibernate’ with RTC mode requiring about 4 μA of current and also removes the need for external power management devices that occupy additional board space.

　　The CC3100 device can connect to any 8， 16， or 32-bit MCU over the SPI or UART Interface and the device driver minimizes the host memory footprint requirements requiring less than 7 KB of code memory and just 700 bytes of RAM for a TCP client application， reducing the need for external memory.