Open Load Detection

This diagnostic detects an open between OUT_+ and OUT_- of > 70Ω or > 200Ω, depending on the value of the CTRL.LDM (load detect threshold) bit.

To detect open loads, three-state the outputs through I²C and discharge the output capacitors by setting the CTRL3.DIS (discharge) bit to 1. Run the open-load diagnostic test by setting CTRL3.RDET (open-load diagnostic enable) to 1. During the diagnostic, all low-side FETs on negative outputs (OUT_-) are turned on while all other FETs are turned off. The device sources a 2mA current from OUT_+ to OUT_-. If a load is not present, OUT_+ swings high and its relatively high VOUT_+ is interpreted as an open output. Results of the diagnostic are reported in the OSTAT0./LDOK[3:0] (load OK indicator) bits.

 

Step-by-Step Procedure (Figure 6)

1. The outputs must be in three-state mode with the charge pump active (CTRL2.STBY = 0). If starting from MUTE or PLAY mode, follow the normal shutdown procedure to prevent click-and-pop.
2. Set CTRL3.LDM based on application requirements.
3. Discharge the outputs to ground by setting CTRL3.DIS = 1 to prevent click-and-pop during diagnostics.
4. Wait at least 200µs.
5. Enable the open-load diagnostic by setting CTRL3.RDET = 1 and CTRL3.DIS = 0.
6. Wait at least 200µs.
7. Read OSTAT0.LDOK[3:0] for results.
8. Disable the open-load diagnostic by setting CTRL3.RDET = 0.

Figure 6. Open-load diagnostic procedure.