TMS320C6201 定點(diǎn)數(shù)字信號(hào)處理器

數(shù)據(jù)： TMS320C6201 Digital Signal Processor 數(shù)據(jù)表

描述

The TMS320C62x? DSPs (including the TMS320C6201) are the fixed-point DSP family in the TMS320C6000? DSP platform. The C6201 device is based on the high-performance, advanced VelociTI? very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. With performance of up to 1600 MIPS at a clock rate of 200 MHz, the C6201 offers cost-effective solutions to high-performance DSP programming challenges. The C6201 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The C6201 can produce two multiply-accumulates (MACs) per cycle--for a total of 466 million MACs per second (MMACS). The C62x? DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6201 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory of the C6201 consists of two 32K-byte blocks of RAM for improved concurrency. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C62x? DSP has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows? debugger interface for visibility into source code execution.

特性

高性能定點(diǎn)數(shù)字信號(hào)處理器（DSP）TMS320C6201
- 5 ns指令周期時(shí)間
- 200-MHz時(shí)鐘速率
- 8個(gè)32位指令/周期
- 1600 MIPS
VelociTI ??高級(jí)超長(zhǎng)指令字（VLIW）TMS320C62x ?? DSP CPU核心
- 八個(gè)獨(dú)立功能單元：
  - 六個(gè)ALU（32/40位）
  - 兩個(gè)16位乘法器（32位結(jié)果）
- 32個(gè)32位通用寄存器的加載存儲(chǔ)架構(gòu)
- 指令打包減少代碼大小
- 所有指令條件
指令集功能
- 字節(jié)可尋址（8位，16位，32位數(shù)據(jù)）
- 32位地址范圍< /li>
- 8位溢出保護(hù)
- 飽和度
- 位域提取，設(shè)置，清除
- 位計(jì)數(shù)
- 規(guī)范化
1M位片上SRAM
- 512K位內(nèi)部編程/高速緩存（16K 32位指令）
- 512K位雙訪問(wèn)內(nèi)部數(shù)據(jù)（64K字節(jié)）組織為兩個(gè)塊以提高并發(fā)性
32位外部存儲(chǔ)器接口（EMIF）
- 異步存儲(chǔ)器的無(wú)縫接口：SRAM和EPROM
- 同步存儲(chǔ)器的無(wú)膠接口：SDRAM和SBSRAM
Four-Cha nnel使用輔助通道引導(dǎo)加載直接內(nèi)存訪問(wèn)（DMA）控制器
16位主機(jī)端口接口（HPI）
- 訪問(wèn)整個(gè)內(nèi)存映射
兩個(gè)多通道緩沖串行端口（McBSP）
- 與T1 /E1，MVIP，SCSA成幀器的直接接口
- 兼容ST-Bus切換
- 每個(gè)最多256個(gè)通道
- AC97兼容
- 串行外設(shè)接口（SPI）兼容（Motorola ??）
靈活的鎖相環(huán)（PLL）時(shí)鐘發(fā)生器
IEEE-1149.1（JTAG ）兼容邊界掃描
352引腳BGA封裝（GJC后綴）
352引腳BGA封裝（GJL后綴）
CMOS技術(shù)
- 0.18-μm/5級(jí)金屬工藝
3.3-VI /Os，1.8 -V Internal

VelociTI和TMS320C62x是德州儀器公司的商標(biāo)。
Motorola是Motorola，Inc。的商標(biāo)。
IEEE標(biāo)準(zhǔn)1149.1-1990標(biāo)準(zhǔn) - 測(cè)試訪問(wèn)端口和邊界掃描架構(gòu)。
TMS320C6000和C62x是Texas Instruments的商標(biāo)。
Windows是Microsoft Corporation的注冊(cè)商標(biāo)。
在本文檔的其余部分中，TMS320C6201器件應(yīng)稱為C6201。