FPGA電源需求和電源解決方案

　　現場可編程門陣列（FPGA）被發現在許多原型和低到中等體積的產品的心臟。FPGA的主要優點是在開發過程中的靈活性，簡單的升級路徑，更快的上市時間，和相對較低的成本。一個關鍵的缺點是復雜性，FPGA往往將一個復雜的片上系統（SoC）。

　　這種復雜性對電力供應提出了苛刻的要求。為了滿足這些挑戰，電源需要幾個輸出和效率和線性穩壓器的清潔電源開關穩壓器的組合。

　　本文介紹了FPGAs的特殊功率要求，說明如何設計一個電源，這些聰明的芯片，然后審查選擇的電源模塊針對FPGA應用程序。

　　Calculating system power

　　Powering an FPGA can seem like powering an entire system. The power supply design engineer is faced with the challenge of supplying from three to 15 voltage rails （and sometimes even more）; and that’s only the start. FPGAs are typically fabricated using the latest wafer-fabrication techniques that require a low-core voltage， but the power supply also has to be powering multiple rails for specialty blocks and circuitry， provide multiple voltage levels， supply extra current for high-power blocks， and satisfy the requirements of noise-sensitive elements.

　　Just to make things a little more complex， even FPGAs from the same manufacturer can vary greatly， making it critical that the engineer chooses the best power supply for each chip. That choice depends on factors such as the voltage and power demands for each rail， the rails’ sequencing requirements， and system power-management needs.

　　The first step in designing an FPGA power supply is to identify the individual voltage rails and their requirements. The FPGA vendor usually supplies a “pin list” that specifies the voltage level for each powered pin that connects to a voltage rail in the device. For example， Table 1shows some of the voltage rails for Altera’s Stratix IV GX FPGA.