資料介紹
The Intersil ISL84467 device is a low ON-resistance, low
voltage, bidirectional, Quad SPDT (Dual DPDT) analog
switch designed to operate from a single +1.65V to +4.5V
supply. Targeted applications include battery powered
equipment that benefit from low rON (0.39Ω) and fast
switching speeds (tON = 33ns, tOFF = 16ns). The digital logic
input is 1.8V logic-compatible when using a single +3V supply.
With a supply voltage of 4.2V and logic high voltage of 2.85V
at both logic inputs, the part draws only 12μA max of ICC
current.
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL84467 is offered in small form factor package, alleviating
board space limitations.
The ISL84467 consists of four SPDT switches. It is configured
as a dual double-pole/double-throw (DPDT) device with two
logic control inputs that control two SPDT switches each. The
configuration can be used as a dual differential 2-to-1
multiplexer/demultiplexer.
voltage, bidirectional, Quad SPDT (Dual DPDT) analog
switch designed to operate from a single +1.65V to +4.5V
supply. Targeted applications include battery powered
equipment that benefit from low rON (0.39Ω) and fast
switching speeds (tON = 33ns, tOFF = 16ns). The digital logic
input is 1.8V logic-compatible when using a single +3V supply.
With a supply voltage of 4.2V and logic high voltage of 2.85V
at both logic inputs, the part draws only 12μA max of ICC
current.
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL84467 is offered in small form factor package, alleviating
board space limitations.
The ISL84467 consists of four SPDT switches. It is configured
as a dual double-pole/double-throw (DPDT) device with two
logic control inputs that control two SPDT switches each. The
configuration can be used as a dual differential 2-to-1
multiplexer/demultiplexer.
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