| Resolution (Bits) | 10 |
| Number of input channels | 1 |
| Sample rate (Max) (kSPS) | 240 |
| Interface type | SPI |
| Architecture | SAR |
| Input type | Single-Ended |
| Rating | Catalog |
| Reference mode | Supply |
| Input range (Max) (V) | 3.6 |
| Input range (Min) (V) | 0 |
| Features | Small Size |
| Operating temperature range (C) | -40 to 85 |
| Power consumption (Typ) (mW) | 0.22 |
| Analog voltage AVDD (Min) (V) | 1.2 |
| SNR (dB) | 61.8 |
| Analog voltage AVDD (Max) (V) | 3.6 |
| INL (Max) (+/-LSB) | 0.5 |
| Digital supply (Min) (V) | 1.2 |
| Digital supply (Max) (V) | 3.6 |
- Single 1.2-V to 3.6-V Supply Operation
- High Throughput
- 200/240/280KSPS for 12/10/8-Bit VDD
1.6 V - 100/120/140KSPS for 12/10/8-Bit VDD 1.2 V
- 200/240/280KSPS for 12/10/8-Bit VDD
- ±1.5LSB INL, 12-Bit NMC (ADS7866)
- 71 dB SNR, –83 dB THD at fIN = 30 kHz (ADS7866)
- Synchronized Conversion with SCLK
- SPI Compatible Serial Interface
- No Pipeline Delays
- Low Power
- 1.39 mW Typ at 200 KSPS, VDD = 3.6 V
- 0.39 mW Typ at 200 KSPS, VDD = 1.6 V
- 0.22 mW Typ at 100 KSPS, VDD = 1.2 V
- Auto Power-Down: 8 nA Typ, 300 nA Max
- 0 V to VDD Unipolar Input Range
- 6-Pin SOT-23 Package
- APPLICATIONS
- Battery Powered Systems
- Isolated Data Acquisition
- Medical Instruments
- Portable Communication
- Portable Data Acquisition Systems
- Automatic Test Equipment
The ADS7866/67/68 are low power, miniature, 12/10/8-bit A/D converters each with a unipolar, single-ended input. These devices can operate from a single 1.6 V to 3.6 V supply with a 200-KSPS throughput for ADS7866. In addition, these devices can maintain at least a 100-KSPS throughput with a supply as low as 1.2 V.
The sampling, conversion, and activation of digital output SDO are initiated on the falling edge of CS\. The serial clock SCLK is used for controlling the conversion rate and shifting data out of the converter. Furthermore, SCLK provides a mechanism to allow digital host processors to synchronize with the con- verter. These converters interface with micro-processors or DSPs through a high-speed SPI compatible serial interface. There are no pipeline delays associated with the device.
The minimum conversion time is determined by the frequency of the serial clock input, SCLK, while the maximum frequency of SCLK is determined by the minimum sampling time required to charge the input capacitance to 12/10/8-bit accuracy for the ADS7866/67/68, respectively. The maximum throughput is determined by how often a conversion is initiated when the minimum sampling time is met and the maximum SCLK frequency is used. Each device automatically powers down after each conversion, which allows each device to save power when the throughput is reduced while using the maximum SCLK frequency.
The converter reference is taken internally from the supply. Hence, the analog input range for these devices is 0 V to VDD.
These devices are available in a 6-pin SOT-23 package and are characterized over the industrial ?40°C to 85°C temperature range.
