具有 Ref 引腳的 2.7V-5.25V 數(shù)字、5V 模擬 12 位 3MSP 并行 ADC
| Resolution (Bits) | 12 |
| Number of input channels | 1 |
| Sample rate (Max) (kSPS) | 3000 |
| Interface type | Byte-Wide, Parallel |
| Architecture | SAR |
| Input type | Pseudo-Differential, Single-Ended |
| Rating | Catalog |
| Reference mode | Ext, Int |
| Input range (Max) (V) | 2.6 |
| Input range (Min) (V) | 0 |
| Features | Oscillator |
| Operating temperature range (C) | -40 to 85 |
| Power consumption (Typ) (mW) | 85 |
| Analog voltage AVDD (Min) (V) | 4.75 |
| SNR (dB) | 69.5 |
| Analog voltage AVDD (Max) (V) | 5.25 |
| INL (Max) (+/-LSB) | 4 |
| Digital supply (Min) (V) | 2.7 |
| Digital supply (Max) (V) | 5.25 |
- 3-MHz Sample Rate, 12-Bit Resolution
- Zero Latency
- Unipolar, Pseudo Differential Input, Range:
- 0 V to 2.5 V
- High-Speed Parallel Interface
- 69.5 dB SNR at 100 kHz I/P
- Power Dissipation 85 mW at 3 MSPS
- Nap Mode (10 mW Power Dissipation)
- Power Down (10 µW)
- Internal Reference
- Internal Reference Buffer
- 48-Pin TQFP Package
- APPLICATIONS
- Optical Networking (DWDM, MEMS Based Switching)
- Spectrum Analyzers
- High Speed Data Acquisition Systems
- High Speed Close-Loop Systems
- Telecommunication
- Ultra-Sound Detection
The ADS7882 is a 12-bit 3-MSPS A-to-D converter with 2.5-V internal reference. The device includes a capacitor based SAR A/D converter with inherent sample and hold. The device offers a 12-bit parallel interface with an additional byte mode that provides easy interface with 8-bit processors. The device has a pseudo-differential input stage.
The ?IN swing of ±200 mV is useful to compensate for ground voltage mismatch between the ADC and sensor and also to cancel common-mode noise. With nap mode enabled, the device operates at lower power when used at lower conversion rates. The device is available in 48-pin TQFP package.
